My apologies if this is the wrong stackexchange for this; it just seemed like the closest one to a place that could be of help for computer architecture. For a homework problem in computer systems I was asked:
Consider three direct mapped caches X, Y, and Z each interpreting an
8-bit address slightly differently according to the {tag:setIdx:byteOffset}
format specified. For each address in the reference stream, indicate whether the
access will hit (H) or miss (M) in each cache.
C1 C2 C3
Address Formats: {2:2:4} {2:3:3} {2:4:2}
Address References in Binary: 00000010, 00000100...
I'm supposed to say whether each of the address references will result in a hit or miss but I don't know where to begin.
For formats, I thought that tag meant the tag of the data in a block of cache, setIdx meant the amount of bits given to represent the different blocks in a cache, and offset was the particular byte within a block that you can choose from.
I feel like I don't understand what a hit or miss is. I thought there were 3 types: compulsory, capacity, and conflict. How would I know which is a compulsory miss if I don't know what is already in the cache? How can I tell the capacity of the cache given the tag formats?
Thanks for any hints or tips.