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I have following piece of code in Vhdl now I want to redirect this signal S1 conditionally to the output port, I will be gratful if someone can guide me through this.

Gen: for index in 0 to 4 generate

 signal s1 : ARRAY_TYPE; --- array of (0 to 7) std_logic_vector (7 downto 0);
 begin  
  process(CLK)
  begin
    if (rising_edge (CLK)) then
        S1(counter_index) <= S_in((index*8+7) downto (index*8));
      end if;  
    end  if;
  end process;
end generate Gen;

I know we can use a process inside generate loop but is otherway around also possible! If I declare S1 as global signal it complains of connected to multi driven net? How this is different?

I will be really grateful if someone can guide me through this

user1107855
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    It's not clear exactly what you're trying to do. Part of the problem might be that you're indexing `S1` with `counter_index`, which is not your generate-loop variable. – fru1tbat Nov 20 '14 at 15:31
  • Thank you very much for your reply. I am try to store the 32 bit input data to a Fifo which 1Dx1D array type as I mentioned. This Counter_index is index which is like a write_pointer controlled by a state machine. Please let me know If I am still unclear, I will glad to describe it again. – user1107855 Nov 20 '14 at 15:37
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    if you assign anything inside a `for ... generate` loop where the target isn't local to the loop, indexed by the loop variable, or conditionally set for only one value of the loop variable (`if index=0 then ...`), you will have a multiple drivers issue. – QuantumRipple Nov 20 '14 at 15:37
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    If `S1(counter_index)` is an 8 bit entry in an array of `std_logic_vector`s, and you're trying to store a 32 bit input, you'll want to use 4 consecutive spots in the array like `S1(counter_index*4 + index) <= S_in((index*8+7) downto (index*8));`. Note that you will consume spots in the 8-bit array in quantities of 4. Depending on what you're trying to do, it might be better to have an array of 32-bit vectors. – QuantumRipple Nov 20 '14 at 15:41
  • Dear Quantumripple, Thank you very much for the answer, If I am understanding right, you mean since I am using a statemachine (external to this for .. gen) to control the counter_index, anything which is out of box (of this loop) will have similar complain!!! – user1107855 Nov 20 '14 at 15:47
  • Dear Quantumripple, --it might be better to have an array of 32-bit vectors Thank you very much for your reply,, – user1107855 Nov 20 '14 at 15:48

2 Answers2

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Your for-generate loop (from 0 to 4) will be unrolled at elaboration so that what you end up with, effectively, is (leaving out the process code for brevity):

for index = 0:

signal s1_0 : ARRAY_TYPE; --- array of (0 to 7) std_logic_vector (7 downto 0);

s1_0(counter_index) <= S_in(7 downto 0);

for index = 1:

signal s1_1 : ARRAY_TYPE; --- array of (0 to 7) std_logic_vector (7 downto 0);

s1_1(counter_index) <= S_in(15 downto 8);

etc.

You get "copies" because you declared the signal inside the generate loop, each of which is local to just that generate block. When you try to make s1 "global" (not really global, which has a different connotation; just declared for the whole architecture), you get:

for index = 0:

s1(counter_index) <= S_in(7 downto 0);

for index = 1:

s1(counter_index) <= S_in(15 downto 8);

See what happened there? Those statements are concurrent, and assigning to the same bits. That's why you have problems with multiple drivers.

The problem appears to be counter_index. Either you need to index s1 with some combination of your loop index with your other index, as QuantumRipple suggested, or you need to create some intermediate signal, or something.

Note that if you're handling 32-bit data a byte at a time, you probably meant 0 to 3, not 0 to 4.

fru1tbat
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  • I didn't even catch that the array was declared inside the loop. I have a feeling that isn't the original code though, because if it was the S1 arrays couldn't be used outside of the loop (where it is never read) which we were shown from the start to end. – QuantumRipple Nov 20 '14 at 16:18
  • It's not clear, exactly, since the code is incomplete. I assumed the code posted was probably an experiment. Either way, your suggestion to use for loops inside one process is probably better overall - I seem to remember having problems occasionally assigning different parts of an array in different processes, and I can't remember exactly why. – fru1tbat Nov 20 '14 at 17:46
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Although fru1tbat covers the solution to your problem, I wanted to cover your other question:

I know we can use a process inside generate loop but is otherway around also possible!

You can use a for ... loop inside of a process statement as well. It functions and gets unrolled similarly to a for... generate statement, but inside of a process. It can also be used to implement more complex logic by using variables or overwriting assignments. Here is a syntax reference for it: http://www.ics.uci.edu/~jmoorkan/vhdlref/for_loop.html

QuantumRipple
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